Intel’s Skylake-EP Xeon E5 2699 v5 Monster Flagship With 32 Cores / 64 Threads Gets Performance Leaked
A Geekbench performance test of a monster chip from Intel has leaked out (thanks for the tip, Shaun Fosmark). While the exact nomenclature of the chip is not known, it appears to be a Skylake-EP Xeon part that was sent to the Google Compute Engine team for initial prototyping. This is consistent with the news we have been hearing about Google Compute Engine now offering extended core counts to clients of their service.
Intel’s massive Skylake Purley flagship, the Xeon E5 2699 v5, spotted in Geekbench database
The chip manages to score an outstanding 49,647 points for all-core score and 3526 points on the single core score. Usually these Xeon chips don’t fare as well in the single core department but this particular CPU is something special and for good measure as well (as you will read later in the article). This score is probably one of the highest all-core scores (if not the highest) on Geekbench for a single socket, single package CPU and showcase very impressive performance numbers. Before we go on any further here are the screenshots of the benchmark score itself:
The leak only states that the tested CPU houses 32 cores (eliminating a 2S benchmark) which makes it one of the hugest dies we have seen from Intel. What is so mysterious about this particular chip is that the documentation of the Skylake Purley platform we have states that it maxes out at 28 cores/56 threads. This leak however, aims to challenge that statement since the Family 6 Model 63 designation puts it solidly in the Xeon family and the only place where such a processor could fit in is the Xeon E5-2699 flagship.
Since this is a Skylake part it will have the “V5” suffix as well, for a full branding of Xeon E5 2699 v5. That said, even though the documentation maxes out at 28 cores/56 threads, we have previously spotted the processor on a Chinese forum and it is very much real. This processor has a base clock of 2.10 GHz and it has a pretty PCB since it’s designed for the latest LGA 3647 socket. The more interesting thing about this processor is its core count which shatters everything that Intel has done before.
In fact, one of the reasons Intel has increased the flagship core count is because AMD will be rolling out its Naples chip very soon and it will be boasting 32 cores under one CPU package as well. Since 2S and 4S designs usually have additional complications involved, a maximum number of cores under one CPU package is always desirable. Intel announced general availability of Skylake-EP chips in mid 2017 and we expect a launch around Computex 2017. Intel has made several HPC focused optimizations in Skylake-EP chips, some of which include Advanced Vector Instructions-512 to boost floating point calculations and encryption algorithms.
Some more details of the Skylake Purley platform
The Skylake Purley platform will be divided between three major categories 2S, 4S and 8S/8S+. This includes the family range from Xeon E5 to Xeon E7. The expected nomenclature should assume the ‘v5’ suffix thanks to the Skylake microarchitecture present in the processors and include the lineups of Xeon E5 2600 v5, Xeon E5 4600 v5, Xeon E7 4800 v5 and Xeon E7 8800 v5. The E5 family includes the dual socket and quad socket designs (2S and 4S) whileas the E7 family includes the 8 socket design structure with the C602 chipset and a scalable memory buffer.
One of the biggest advancements that Skylake will have is the Intel Omnipath Architecture integration which will be called Storm Lake (Generation 1). The PCH will be codenamed Lewisburg while as it will also ship with updated Ethernet controllers. Another very important point to note is that the platform will be scalable up to 8 Sockets – which is frankly an absolutely insane amount for CPUs working in tandem in any given configuration. Specific SKUs have not been disclosed at this time. Since we already have in our possession the complete slide deck of this platform, I have taken the liberty to post the important bits here:
Skylake EX Purley will be spread out amongst the entire scalable segment – unlike the previous iterations. The TDP will be configurable from 45W to 165W and will require Socket P. Another interesting point to note is the fact that not only will Purley update the number of PCIe slots to 48 but they will finally be configurable in x4, x8 and x16 divisions ( a major update). Previous reports had hinted on Intel working on some secret project that will prove Skylake to be quite a big architectural jump and not simply another Harwell. While we haven’t seen any evidence of this revolutionary change on the mainstream side – Skylake Purley does appear to be the aforementioned jump, incarnate.
According to Intel’s own slides, Skylake Purley is poised to be the biggest update since the age old Nehalem platform. Along with the improved performance per watt that comes with every article iteration, Skylake EX Purley will actually ship with 6 Channels of DDR4 as opposed to 4. It will also include the AVX 512 instruction set and will boast the 100G OmniPath interconnect. Skylake Purley will also have Cannonlake graphics support not to mention FPGA integration (another important upgrade).
The new platform also comes with an updated socket. The socket has been upgraded to feature 3647 pins that gives it the LGA 3647 name. The socket is surrounded by 12 DDR4 DIMM slots. This is due to support for next-generation hexa-channel memory and Intel’s Optane DIMMs for faster latency solutions. Overall, Purley will be expanding Intel’s server platform with a range of new features.
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